Added two additional DRAM timings of Read to Write Delay (tRTW) and Write to Read delay (tWTR) for the nVidia nForce2 chipset. The nForce2 FSB frequency control box enhanced with information about DRAM frequency. Added preliminary support to VIA VT82C686 south bridge to determine the VCore and CPU temperature. Added support to the AMD Athlon 64 X2 3800+ processor.
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